U.S. Pat. No. 6,501,408 describes a finite impulse response digital-to-analog converter (FIRDAC). Generally speaking, a FIRDAC comprises a shift register with a large number of stages that receive a bitstream input signal, which is a serial datastream with one bit amplitude resolution. Each stage switches a dedicated current source on or off. The currents thus generated by all of the stages of the shift register are added to generate an output current of the FIRDAC. Accordingly, each stage produces an output current contributing to the overall output current of the FIRDAC. However, the stages of the FIRDAC do not all contribute in the same extent. In order to obtain a desired filter characteristic, each stage has an associated weighing coefficient, which is constituted by the magnitude of the output current of the current source.